Low Power Mixed-Signal SoC Integration and Verification Challenges with Third Party IP Cores
Low Power Mixed-Signal SoC Integration and Verification Challenges with Third Party IP Cores
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Publisher
Ghent: European Alliance for Innovation (EAI)
Journal title
Language
English
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Publisher
Ghent: European Alliance for Innovation (EAI)
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Scope and Contents
Contents
IP reuse is all about improving productivity and can result in significantly shrinking the design cycle time especially with configurable third party IP cores. Increasing amount of third party IPs find their way onto today's complex system-on-chip (SoC) designs. Hence it is paramount that designers build a large and expanding knowledge base incorpo...
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Full title
Low Power Mixed-Signal SoC Integration and Verification Challenges with Third Party IP Cores
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Record Identifier
TN_cdi_doaj_primary_oai_doaj_org_article_449456edac22430fa15c55366f2496a9
Permalink
https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_doaj_primary_oai_doaj_org_article_449456edac22430fa15c55366f2496a9
Other Identifiers
ISSN
2410-6895
E-ISSN
2410-6895
DOI
10.4108/eai.5-11-2019.162592
