Performance of Active-Quenching SPAD Array Based on the Tri-State Gates of FPGA and Packaged with Ba...
Performance of Active-Quenching SPAD Array Based on the Tri-State Gates of FPGA and Packaged with Bare Chip Stacking
About this item
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Author / Creator
Liu, Liangliang , Lv, Wenxing , Liu, Jian , Zhang, Xingan , Liang, Kun , Yang, Ru and Han, Dejun
Publisher
Switzerland: MDPI AG
Journal title
Language
English
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Publication information
Publisher
Switzerland: MDPI AG
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Scope and Contents
Contents
The performance of an active-quenching single-photon avalanche diode (SPAD) array that is based on the tri-state gates of a field programmable gate array (FPGA) is presented. The array is implemented by stacking a bare 4 × 4 N-on-P SPAD array on a bare FPGA die, and the electrodes of the SPAD pixels and the I/O ports of the FPGA are connected throu...
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Full title
Performance of Active-Quenching SPAD Array Based on the Tri-State Gates of FPGA and Packaged with Bare Chip Stacking
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Record Identifier
TN_cdi_doaj_primary_oai_doaj_org_article_bc1afc7ee7c04b0ab1db2edc95f2e052
Permalink
https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_doaj_primary_oai_doaj_org_article_bc1afc7ee7c04b0ab1db2edc95f2e052
Other Identifiers
ISSN
1424-8220
E-ISSN
1424-8220
DOI
10.3390/s23094314
