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Fault-Tolerant Network-On-Chip Router Architecture Design for Heterogeneous Computing Systems in the...

Fault-Tolerant Network-On-Chip Router Architecture Design for Heterogeneous Computing Systems in the...

https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_doaj_primary_oai_doaj_org_article_e22429f78d544777a4e350fa420dac2a

Fault-Tolerant Network-On-Chip Router Architecture Design for Heterogeneous Computing Systems in the Context of Internet of Things

About this item

Full title

Fault-Tolerant Network-On-Chip Router Architecture Design for Heterogeneous Computing Systems in the Context of Internet of Things

Publisher

MDPI

Journal title

Sensors (Basel, Switzerland), 2020-09, Vol.20 (18), p.5355

Language

English

Formats

Publication information

Publisher

MDPI

More information

Scope and Contents

Contents

Network-on-chip (NoC) architectures have become a popular communication platform for heterogeneous computing systems owing to their scalability and high performance. Aggressive technology scaling makes these architectures prone to both permanent and transient faults. This study focuses on the tolerance of a NoC router to permanent faults. A permane...

Alternative Titles

Full title

Fault-Tolerant Network-On-Chip Router Architecture Design for Heterogeneous Computing Systems in the Context of Internet of Things

Identifiers

Primary Identifiers

Record Identifier

TN_cdi_doaj_primary_oai_doaj_org_article_e22429f78d544777a4e350fa420dac2a

Permalink

https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_doaj_primary_oai_doaj_org_article_e22429f78d544777a4e350fa420dac2a

Other Identifiers

ISSN

1424-8220

E-ISSN

1424-8220

DOI

10.3390/s20185355

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