Majority Logic Mapping for Soft Error Dependability
Majority Logic Mapping for Soft Error Dependability
About this item
Full title
Majority Logic Mapping for Soft Error Dependability
Author / Creator
Publisher
Boston: Springer US
Journal title
Journal of electronic testing, 2008-06, Vol.24 (1-3), p.83-92
Language
English
Formats
Publication information
Publisher
Boston: Springer US
Subjects
More information
Scope and Contents
Contents
This work proposes the use of analog majority gates to implement combinational circuits that are intrinsically tolerant to transient faults. A new type of voter circuit, that uses some knowledge from the analog design arena is proposed, together with a new mapping approach to implement circuits given their input/output table. This new mapping appro...
Alternative Titles
Full title
Majority Logic Mapping for Soft Error Dependability
Authors, Artists and Contributors
Identifiers
Primary Identifiers
Record Identifier
TN_cdi_proquest_miscellaneous_32436802
Permalink
https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_proquest_miscellaneous_32436802
Other Identifiers
ISSN
0923-8174
E-ISSN
1573-0727
DOI
10.1007/s10836-007-5044-0
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