Adaptive Hybrid Storage Format for Sparse Matrix–Vector Multiplication on Multi-Core SIMD CPUs
Adaptive Hybrid Storage Format for Sparse Matrix–Vector Multiplication on Multi-Core SIMD CPUs
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Publisher
MDPI AG
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Language
English
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MDPI AG
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Optimizing sparse matrix–vector multiplication (SpMV) is challenging due to the non-uniform distribution of the non-zero elements of the sparse matrix. The best-performing SpMV format changes depending on the input matrix and the underlying architecture, and there is no “one-size-fit-for-all” format. A hybrid scheme combining multiple SpMV storage...
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Adaptive Hybrid Storage Format for Sparse Matrix–Vector Multiplication on Multi-Core SIMD CPUs
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TN_cdi_doaj_primary_oai_doaj_org_article_f74c73edd91843f48c81a99a28b6558c
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https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_doaj_primary_oai_doaj_org_article_f74c73edd91843f48c81a99a28b6558c
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ISSN
2076-3417
E-ISSN
2076-3417
DOI
10.3390/app12199812
