Study and Simulation of Dead-Time Compensation for the Voltage Source SVPWM Inverter
Study and Simulation of Dead-Time Compensation for the Voltage Source SVPWM Inverter
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Publisher
Zurich: Trans Tech Publications Ltd
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Language
English
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Zurich: Trans Tech Publications Ltd
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Contents
The dead-time effect of the SVPWM inverter was analyzed as well as its effect on the control system performance (distortion of phase voltage and zero-current clamp phenomenon of phase current, etc).Then, basing on the analysis about the generation of the dead-time effect, the error voltage vector compensation strategy was raised. In order to verify...
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Full title
Study and Simulation of Dead-Time Compensation for the Voltage Source SVPWM Inverter
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TN_cdi_proquest_journals_1442515095
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https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_proquest_journals_1442515095
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ISBN
9783037856512,3037856513
ISSN
1660-9336,1662-7482
E-ISSN
1662-7482
DOI