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Study and Simulation of Dead-Time Compensation for the Voltage Source SVPWM Inverter

Study and Simulation of Dead-Time Compensation for the ...

Study and Simulation of Dead-Time Compensation for the Voltage Source SVPWM Inverter

https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_proquest_journals_1442515095

Study and Simulation of Dead-Time Compensation for the Voltage Source SVPWM Inverter

About this item

Full title

Study and Simulation of Dead-Time Compensation for the Voltage Source SVPWM Inverter

Publisher

Zurich: Trans Tech Publications Ltd

Journal title

Applied Mechanics and Materials, 2013-02, Vol.300-301, p.1200-1204

Language

English

Formats

Publication information

Publisher

Zurich: Trans Tech Publications Ltd

More information

Scope and Contents

Contents

The dead-time effect of the SVPWM inverter was analyzed as well as its effect on the control system performance (distortion of phase voltage and zero-current clamp phenomenon of phase current, etc).Then, basing on the analysis about the generation of the dead-time effect, the error voltage vector compensation strategy was raised. In order to verify...

Alternative Titles

Full title

Study and Simulation of Dead-Time Compensation for the Voltage Source SVPWM Inverter

Authors, Artists and Contributors

Identifiers

Primary Identifiers

Record Identifier

TN_cdi_proquest_journals_1442515095

Permalink

https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_proquest_journals_1442515095

Other Identifiers

ISBN

9783037856512,3037856513

ISSN

1660-9336,1662-7482

E-ISSN

1662-7482

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