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Low-Power High-Frequency Phase Frequency Detector for Minimal Blind-Zone Phase-Locked Loops

Low-Power High-Frequency Phase Frequency Detector for Minimal Blind-Zone Phase-Locked Loops

https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_proquest_journals_2058282634

Low-Power High-Frequency Phase Frequency Detector for Minimal Blind-Zone Phase-Locked Loops

About this item

Full title

Low-Power High-Frequency Phase Frequency Detector for Minimal Blind-Zone Phase-Locked Loops

Publisher

New York: Springer US

Journal title

Circuits, systems, and signal processing, 2019-02, Vol.38 (2), p.498-511

Language

English

Formats

Publication information

Publisher

New York: Springer US

More information

Scope and Contents

Contents

This paper describes a symmetric phase frequency detector (PFD). The symmetric structure of PFD provides phase-locked loop (PLL) functions with a low jitter. The most important point in designing PFDs is attention to their dead zone, the extent of their linearity, and the frequency range of operation. As the dead zone of a phase detector circuit is...

Alternative Titles

Full title

Low-Power High-Frequency Phase Frequency Detector for Minimal Blind-Zone Phase-Locked Loops

Authors, Artists and Contributors

Identifiers

Primary Identifiers

Record Identifier

TN_cdi_proquest_journals_2058282634

Permalink

https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_proquest_journals_2058282634

Other Identifiers

ISSN

0278-081X

E-ISSN

1531-5878

DOI

10.1007/s00034-018-0887-4

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