Hierarchical representation of on-chip context to reduce reconfiguration time and implementation are...
Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture
About this item
Full title
Author / Creator
Wang, YanSheng , Liu, LeiBo , Yin, ShouYi , Zhu, Min , Cao, Peng , Yang, Jun and Wei, ShaoJun
Publisher
Berlin/Heidelberg: Springer Berlin Heidelberg
Journal title
Language
English
Formats
Publication information
Publisher
Berlin/Heidelberg: Springer Berlin Heidelberg
Subjects
More information
Scope and Contents
Contents
In reconfigurable system, fast reconfiguration and small size of configuration contexts are strongly required to enhance the processing performance and reduce the implementation overhead. In this paper, a hierarchical representation of contexts for CGRA called HCC is proposed to satisfy the above requirements. In HCC, the contexts are constructed i...
Alternative Titles
Full title
Hierarchical representation of on-chip context to reduce reconfiguration time and implementation area for coarse-grained reconfigurable architecture
Authors, Artists and Contributors
Author / Creator
Identifiers
Primary Identifiers
Record Identifier
TN_cdi_proquest_miscellaneous_1506377161
Permalink
https://devfeature-collection.sl.nsw.gov.au/record/TN_cdi_proquest_miscellaneous_1506377161
Other Identifiers
ISSN
1674-733X
E-ISSN
1869-1919
DOI
10.1007/s11432-013-4842-5
